Jorge Maestre Vidal

Jorge Maestre Vidal (https://jmaestrevidal.com) is researcher at the Complutense University of Madrid, Spain. In 2016 he is Visiting Research at Instituto de Telecomunicações (IT), Aveiro, Portugal. He is member of the Department of Software Engineering and Artificial Intelligence (DISIA) of the Faculty of Computer Science and Engineering. In addition to his academic activities, his professional experience includes projects with private organizations (Banco Santander, Safelayer Secure Communications S.A., etc.) and public (FP7, Horizon 2020, Plan Nacional de I+D+i, Spanish Ministry of Defense, etc.). He is currently participant in the European projects SELFNET (H2020-ICT-2014-2/671672) and RAMSES (H2020-FCT-04-2015/700326). His main research interests are Artificial Intelligence, Information Security and the emerging Communication Technologies, where he has significant background proved by publications in several research journals (Knowledge-Based Systems, Swarm and Evolutionary Computation, Journal of Network and Computer Applications, etc.), conferences (EuroS&P, ICIT, RAID, etc.), participation at international research projects (H2020, COST, CYTED), experience as peer-reviewer (Elsevier, MDPI, IEEE, Adelaide, etc.) and member of different organizing/technical committees (5G-PPP, SDN-NGAS, ICQNM, AIR, etc.).